This is how my tester looks like:
Red wire = +5V (VCC)
Green wire = GND
Wellow wire = Clock
Place a fast capacitor (tantal, 0.1 .. 4.7 uF) from VCC to GND! as close as possible to the CPU
The small button at the right is used to RESET the CPU
If you will see a nice PCB version that Floris made click here
Remember: NEVER leave inputs unconnected, they can/will confuse the CPU!
A good idea is to connect unused inputs via a resistor to VCC (about 470 .. 5k) to create a HIGH (inactive) signal level
All unconnected CPU pins are outputs, try to connect some LEDs here also, pins 18 and 23 are not interesting, ok
CLOCK : 35mS period time, equal to 28Hz
A0 : 140mS Low, 140mS High
A1 : 280mS Low, 280mS High
A2 : 560mS Low, 560mS High
My tester consumed about 60mA at 5.0Volt, with a Z8400A from Zilog.
You will see that the Z80 CPU need a few clocks to execute the RESET.
You can also test what happens at power-up, with or without clock applied.
Strange things will happen if you try to give it shorter RESET than clock, weird modes of opperating will then happen, eg: higher address pins will have faster clock frequency than A0 !!, the CPU is not damaged ! just give it a RESET longer than 4 clocks.
this is why you should always use a RESET circuit like this: it will give a controlled reset time and no noise when RESET pin is rised to start the CPU
if you wish to single step clock and reset, then use this circuit to generate a good clean clock signal
During the last half of the Instruction Opcode Fetch a Refresh address is placed on the lower 7 bits of the Address bus. This can make the upper 9 bits appear as if they are oscillating in respect to the clock since they are driven low during that portion of the cycle. If you only take the state of the address bus when /M1 is active, you will see the appropriate memory address is on the bus.
This seems to be different from type of CPU to CPU, mine did what I have measured on A0 to A2 and so far...
When you manage to get this to work, then please continue to the
Done and tested by me at June the 12th, 1998.